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R2S15902FP
6ch Electronic Volume with 4 Input Selector
REJ03F0152-0100 Rev.1.0 Nov.22.2005
Description
R2S15902FP is an audio signal processor for home audio. This IC contains 6 channels electronic volume, gain control, input selector and 2 band tone control.
Features
* * * * * * * * * 6 channels independent electronic volume (0 to -99dB/1dBstep, -dB) 6 channels independent gain control (0 to +14dB/ 2dB step) L/R channel 4 input selector (Input gain: 0 to +14dB/ 2dB step) Multi channel input: 6 channels input Tone control Bass: -14 to + 14dB(2dB step), Treble: -14 to + 14dB(2dB step) Can use 1 input for REC output (REC output gain: 0, +2, +4, +6dB) Built-in ADC output (Input Att: 0/ -6/ -12/ -18dB) Built-in L+R/ L-R block Built-in digital power supply
Recommended Operating Condition
Supply voltage range VCC = 8.0V to 10.0V: 9.0V(typ)
Application
Receiver, AV amp, Home theater, Mini stereo etc.
System Block Diagram
REC OUT (4) Multi Multi Rin Lin Lch Tone Rch Tone DGND CLOCK DATA MCU I/F
Input Selector
Tone Input Gain Volume Bass& Treble REC Gain Input Gain Volume Bass& Treble Gain Control Rout Gain Control Lout
1 Lch 2 3
LoSL Input ATT
+ -
Lch (L-R)
SLin MSLin SRin MSRin Cin MCin SWin MSWin
Volume
Gain Control SLout
ADCL (L-R)
Volume
Gain Control SRout
1 Rch 2 3
Input Selector
REC Gain Input ATT
LoSR
+ -
Rch (L+R)
Volume
Gain Control
Cout
ADCR (L+R)
Volume
Gain Control
SWout
(4) REC OUT
AGND
Vref VCC
Rev.1.0 Nov 22, 2005 page 1 of 15
R2S15902FP
Block Diagram and Pin Configuration
SWOUT SROUT CLOCK SLOUT BASR1 BASR2 DGND
12 11 SRIN
50k
ROUT
COUT
LOUT
22 BASL2 BASL1 23 24
21
20
Gain Control
19
Gain Control
18
Gain Control
17
Gain Control
16
Gain Control
15
Gain Control
14
C
13
D
+ -
+ -
Cch Vol 50 k
+ -
SWch Vol 50 k
SLch Vol 50k
+ -
MCU I/F
SRch Vol 50k
Logic
50 k
DATA
+ -
+ -
10 SLIN
TRER 25 TREL VOLINL GAINOUTL VOLINR GAINOUTR INL1 INR1 INL2 26 27
Input Gain
Bass /Tre Bass /Tre
Lch Vol 25k 50k Rch Vol 25k 50 k
9 SWIN 8 CIN 7 RIN 6 LIN 5 RINSR 4 ROUTSR
28 29
Input Gain
+ -
25 k
25 k
50k
30 31
25k
+ -
REC Output Gain Lch + REC Output Gain Rch + -
+ -
Input ATT
50k
3
LINSL
32
25k
2 LOUTSL
+ Input ATT 50k Lch (L- R) 50 k
33
25k 25k 25k 25k 25k 25 k
1
ADCL (L-R)
+ -
Rch (L+R)
34
35
36
37
38
39
40
41
42
43
44
VREF
INR4 (RECR1)
ADCR (L+R)
INR2
INR3
INL4 (RECL1)
L+RCIN
INL3
AGND
(Top View)
Rev.1.0 Nov 22, 2005 page 2 of 15
L+RSWIN
VCC
R2S15902FP
Pin Description
Pin No. 1 2 3 4 5 6, 7, 8, 9, 10, 11 12 13 14 15, 16, 17, 18, 19, 20 21, 22 23, 24 25, 26 27, 29 28, 30 31,33,35, 32,34,36 37, 38 39 40 41 42 43 44 Name ADCL (L-R) LOUTSL LINSL ROUTSR RINSR LIN, RIN, CIN, SWIN, SLIN, SRIN DGND DATA CLOCK SROUT, SLOUT, SWOUT, COUT, ROUT, LOUT BASR1, BASR2, BASL1, BASL2 TRER, TREL VOLINL, VOLINR GAINOUTL, GAINOUTR INL1, 2, 3, INR1, 2, 3 INL4/RECL1, INR4/RECR1 AGND VREF VCC ADCR(L+R) L+RCIN L+RSWIN Function Output pin for ADC (and L-R output) L channel pre-output (REC output) for SL channel SL channel input from L channel pre-output (REC output) R channel pre-output (REC output) for SR channel SR channel input from R channel pre-output (REC output) Input pin of L/R/C/SW/SL/SR channel (Multi) Digital ground Input pin of control data Input pin of control clock Output pin of SR/SL/SW/C/R/L channel
Frequency characteristic setting pin of R/L channel tone control (BASS) Frequency characteristic setting pin of R/L channel tone control (Treble) Input pin of L/R channel volume Output pin of L/R channel Input gain Input pin of L/R channel (Input selector) Input pin of L/R channel (Input selector) can use REC output pin Analog ground 1/2 VCC input Power supply to internal analog circuit Output pin for ADC(and L+R output) L+R input for C channel L+R input for SW channel
Rev.1.0 Nov 22, 2005 page 3 of 15
R2S15902FP
Absolute Maximum Ratings
Parameter Power supply Power dissipation Thermal derating Operating temperature Storage temperature Pd K Topr Tstg Symbol Supply voltage Ratings 10.5 1.25 12.5 -20 to +75 -40 to +125 Unit V W mW/C C C VCC Ta25C Ta>25C Condition
THERMAL DERATINGS (MAXIMUM RATING) 2.0
POWER DISSIPATION pd (W)
1.5
1.25
1.0
0.63
0.5
0 0 25 50 75 100 125 AMBIENT TEMPERATURE Ta (C)
Recommended Operating Conditions
(Ta=25C, unless otherwise noted.)
Parameter Supply voltage Logic "H" level input voltage Logic "L" level input voltage Symbol VCC VIH VIL Min 8.0 2.7 0 Typ 9.0 Max 10.0 5.5 0.7 Unit V V V Condition VCC = 9V VCC = 9V
Rev.1.0 Nov 22, 2005 page 4 of 15
R2S15902FP
Relationship Between Data and Clock
Data signal is read at the rising edge of CLOCK. Make "H" at the timing which DATA of D0-D23 make latch.
DATA
D0
D1
D2
D3
D21
D22
D23
CLOCK
When DATA is "H", latch signal is created at the falling edge of CLOCK. When CLOCK is "L" and latch signal is created, latch signal is read at the falling edge of DATA.
Clock and Data Timings
DATA
(D0 to D23)
t cr
LATCH
75% 25% tSLD
tSLD tHLD tSHD tHHD
tHLD tSC
75% 50% 25%
CLOCK
tr tWHC
tf tWLC
Timing Definition of Digital Block
Parameter CLOCK cycle time CLOCK pulse width ("H" level) CLOCK pulse width ("L" level) Rising time of clock and data Falling time of clock and data DATA setup time (Rising time of clock) DATA setup time (Falling time of clock) DATA hold time ("H" level) DATA hold time ("L" level) CLOCK setup time Symbol tcr tWHC tWLC tr tf tSHD tSLD tHHD tHLD tSC Min 8 3.2 3.2 1.6 1.6 1.6 1.6 1.6 Limits Typ Max 0.8 0.8 s Unit
Rev.1.0 Nov 22, 2005 page 5 of 15
R2S15902FP
Power on Reset
This IC built-in the power on reset function. The voltage of VCC-GND less than 4V, the serial DATA can not accept.
(V)
VCC - GND
4V
(S) Reset time After reset is canceled, the serial DATA can accept.
Release of reset.
Data Control Specification
Initialize all data of the 4 formats when digital power supply (VCC) turns on. Prohibit using except specified data code as follows.
Slot1 D0a D1a D2a D3a D4a D5a D6a D7a (2) (3) (4) (1)Input Selector REC REC- Output ADC Gain Input Out Control ATT D8a D9a D10a D11a D12a D13a D14a D15a D16a D17a D18a D19a D20a D21a D22 D23 (8) (5) SL/SR (9) Input Gain (6) Bass/ L/R (7) Treble 0 0 0 /C/SW Input Tone Control Bypass Input Slot2 D0b D1b D2b D3b D4b D5b D6b D7b D8b D9b D10b D11b D12b D13b D14b D15b D16b D17b D18b D19b D20b D21b D22 D23 (10) Lch Gain Control (11)Lch Volume (10) RchGain Control (11) Rch Volume 0 0 0 1
Slot3 D0c D1c D2c D3c D4c D5c D6c D7c D8c D9c D10c D11c D12c D13c D14c D15c D16c D17c D18c D19c D20c D21c D22 D23 (10) CchGain Control (11)Cch Volume (10) SWch Gain Control (11)SWch Volume 0 0 1 0
Slot4 D0d D1d D2d D3d D4d D5d D6d D7d D8d D9d D10d D11d D12d D13d D14d D15d D16d D17d D18d D19d D20d D21d D22 D23 (10) SLchGain Control (11)SLch Volume (10) SRch Gain Control (11) SRch Volume 0 0 1 1
Note:
No guarantee except for these codes.
Rev.1.0 Nov 22, 2005 page 6 of 15
R2S15902FP
Setting Code
It's initial setting when power is turned on. (1) Input Selector
Setting ALL OFF IN1 IN2 IN3 IN4*1 D0a 0 0 1 1 0 D1a 0 1 0 1 0 D2a 0 0 0 0 1
Note: No guarantee except for these codes.
(2) REC Output
REC output Setting OFF REC1 D3a 0
ON 1*1 *1: When IN4 selected, REC1 can not use. IN4 ON REC1 OFF D0a 0 D1a 0 D2a 1 D3a 1
(3) REC-Output Gain Control
Gain setting 0dB +2dB +4dB +6dB D4a 0 0 1 1 D5a 0 1 0 1
(4) ADC Input ATT
ATT setting 0dB -6dB -12dB D6a 0 0 1 D7a 0 1 0
*2
-18dB 1 1 *2: When L R selected, ADC input ATT can not use.
(5) L/R Input
Setting Selector in Multi in D8a 0 1
Rev.1.0 Nov 22, 2005 page 7 of 15
R2S15902FP It's initial setting when power is turned on. (6) Bass/Bypass (Tone control is bypass)
Gain setting +14dB +12dB +10dB +8dB +6dB +4dB +2dB 0dB -2dB -4dB -6dB -8dB -10dB -12dB -14dB D9a 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 D10a 1 1 1 1 0 0 0 0 0 0 0 1 1 1 1 D11a 1 1 0 0 1 1 0 0 0 1 1 0 0 1 1 0 D12a 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
(7) Treble
Gain setting +14dB +12dB +10dB +8dB +6dB +4dB +2dB 0dB -2dB -4dB -6dB -8dB -10dB -12dB -14dB D13a 1 1 1 1 1 1 1 1/0 0 0 0 0 0 0 0 D14a 1 1 1 1 0 0 0 0 0 0 0 1 1 1 1 D15a 1 1 0 0 1 1 0 0 0 1 1 0 0 1 1 D16a 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Bypass*3 0 0 *3: Tone control is bypass.
(8) SL/ SR/ C/ SW Input
Setting L R in D17a 0*2
*2
Multi in 1 *2: When L R selected, ADC input ATT can not use.
(9) Input Gain
Gain setting 0dB +2dB +4dB +6dB +8dB +10dB +12dB +14dB D18a 0 0 0 0 1 1 1 1 D19a 0 0 1 1 0 0 1 1 D20a 0 1 0 1 0 1 0 1
(10) Gain Control
Lch Rch Gain setting Cch SWch SLch SRch 0dB +2dB +4dB +6dB +8dB +10dB +12dB +14dB D0b D10b D0c D10c D0d D10d 0 0 0 0 1 1 1 1 D1b D11b D1c D11c D1d D11d 0 0 1 1 0 0 1 1 D2b D12b D2c D12c D2d D12d 0 1 0 1 0 1 0 1
Rev.1.0 Nov 22, 2005 page 8 of 15
R2S15902FP (11) 6channels Volume It's initial setting when power is turned on.
Lch Rch Cch SWch SLch SRch 0dB -1dB -2dB -3dB -4dB -5dB -6dB -7dB -8dB -9dB -10dB -11dB -12dB -13dB -14dB -15dB -16dB -17dB -18dB -19dB -20dB -21dB -22dB -23dB -24dB -25dB -26dB -27dB -28dB -29dB -30dB -31dB -32dB -33dB -34dB -35dB -36dB -37dB -38dB -39dB -40dB -41dB -42dB -43dB D3b D13b D3c D13c D3d D13d 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D4b D14b D4c D14c D4d D14d 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 D5b D15b D5c D15c D5d D15d 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 D6b D16b D6c D16c D6d D16d 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 D7b D17b D7c D17c D7d D17d 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 D8b D18b D8c D18c D8d D18d 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D9b D19b D9c D19c D9d D19d 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
ATT
Rev.1.0 Nov 22, 2005 page 9 of 15
R2S15902FP
Lch Rch Cch SWch SLch D3b D13b D3c D13c D3d D13d 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D4b D14b D4c D14c D4d D14d 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D5b D15b D5c D15c D5d D15d 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 D6b D16b D6c D16c D6d D16d 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 D7b D17b D7c D17c D7d D17d 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 D8b D18b D8c D18c D8d D18d 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 D9b D19b D9c D19c D9d D19d 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
ATT
SRch -44dB -45dB -46dB -47dB -48dB -49dB -50dB -51dB -52dB -53dB -54dB -55dB -56dB -57dB -58dB -59dB -60dB -61dB -62dB -63dB -64dB -65dB -66dB -67dB -68dB -69dB -70dB -71dB -72dB -73dB -74dB -75dB -76dB -77dB -78dB -79dB -80dB -81dB -82dB -83dB -84dB -85dB -86dB -87dB -88dB -89dB -90dB
Rev.1.0 Nov 22, 2005 page 10 of 15
R2S15902FP
Lch Rch Cch SWch SLch D3b D13b D3c D13c D3d D13d 1 1 1 1 1 1 1 1 1 D4b D14b D4c D14c D4d D14d 0 0 0 0 0 1 1 1 1 D5b D15b D5c D15c D5d D15d 1 1 1 1 1 0 0 0 0 D6b D16b D6c D16c D6d D16d 1 1 1 1 1 0 0 0 0 1/0 D7b D17b D7c D17c D7d D17d 0 1 1 1 1 0 0 0 0 1 D8b D18b D8c D18c D8d D18d 1 0 0 1 1 0 0 1 1 1/0 D9b D19b D9c D19c D9d D19d 1 0 1 0 1 0 1 0 1 1/0
ATT
SRch -91dB -92dB -93dB -94dB -95dB -96dB -97dB -98dB -99dB
-dB 1 1 1/0 Note: No guarantee except for these codes.
Electrical Characteristics
Unless otherwise noted, Ta = 25C, VCC = 9V, f = 1kHz, Volume = 0dB, Input selector = IN1, Input gain = 0db, Gain control = 0dB, ADC input ATT = 0dB, Tone = Bypass, L/R input = Selector in, SL/SR/C/SW input = LR in (1) Power supply characteristics
Limits Parameter Analog power supply circuit current Symbol ICC Min Typ 35 Max 55 Unit mA Test condition With VCC = 9V VCC current, when no signal is provided
Rev.1.0 Nov 22, 2005 page 11 of 15
R2S15902FP (2) Input/Output characteristics (OVER ALL)
Limits Parameter Input resistance Maximum output voltage Pass gain Symbol Min Rin 17 VOM Gv 1.8 -2.0 -- -0.5 -- -- -- Typ 25 2.2 0 0.005 0 2 9 2 9 2 9 -90 -90 -90 Max 33 -- 2.0 0.02 0.5 6 18 6 18 6 18 -70 -70 -70 dB
Vrms
Unit k Vrms dB % dB 6 to 11, 31 to 36 pin
Test condition 6 to 11pin input, 15 to 20pin output, THD = 1%, RL = 10k, Output gain control = +6dB 6 to 11pin input, 15 to 20pin output, Vi = 0.3Vrms, FLAT 6 to 11pin input, 15 to 20pin output, BW: 400Hz to 30kHz, f = 1kHz, Vo = 0.5Vrms, RL = 10k 31,32pin input, 19,20pin output, Vi = 0.3Vrms JIS-A, Rg = 0, 19,20pin output, Volume = -dB setting JIS-A, Rg = 0, 19,20pin output, Volume = 0dB setting Output gain control = 0dB Output gain control = +14dB Output gain control = 0dB Output gain control = +14dB
Total harmonic THD distortion Balance of CBAL mutual channels Vono1 Output noise voltage Vono2 Vono3 SS1 SS2 CS
JIS-A, Rg = 0, 15 to 18pin output, Output gain control = 0dB Volume = 0dB setting Output gain control = +14dB < Input selector> Vo = 1Vrms, Rg = 0, RL = 10k, JIS-A < Multi input selector > Vo = 1Vrms, Rg = 0, RL = 10k, JIS-A Vo = 1Vrms, Rg = 0, RL = 10k, JIS-A
Selector separation Channel separation
(3) 6 channel Volume characteristics
Parameter Maximum attenuation Volume gain gang error of mutual channels Symbol ATTmax Dvol Min -- -0.5 Limits Typ Max -105 -95 0 +0.5 Unit dB dB Test condition Vi = 2Vrms, JIS-A, VOL = -dB Volume = 0dB
(4) Tone control characteristics Unless otherwise noted, Tone ON/OFF = ON
Parameter Tone control voltage gain (Boost/Bass) Tone control voltage gain (Cut/Bass) Tone control voltage gain (Boost/Treble) Tone control voltage gain (Cut/Treble) Balance of mutual channels Symbol G (BASS) B G (BASS) C G (TRE) B G (TRE) C BALT Min +11 -17 +11 -17 -2 Limits Typ Max +14 -14 +14 -14 0 +17 -11 +17 -11 +2 Unit dB dB dB dB dB Test condition f = 100Hz Bass +14dB setting f = 100Hz Bass -14dB setting f = 10kHz Treble +14dB setting f = 10kHz Treble -10dB setting Bass setting +14, -14dB Treble setting +14, -14dB
Rev.1.0 Nov 22, 2005 page 12 of 15
R2S15902FP
Tone Control
(1) Bass
< Boost >
IN
+
+
OUT
[Designed Parameter] R1=4.7k, C1=0.047F, C2=0.15F Gain Setting (Hz) +14dB +12dB +10dB +8dB +6dB +4dB +2dB (dB)
Designed Parameter
R3
R2 f0 = 1 2 R1(R2+R3)C1C2 (R2+R3)R1C1C2 Q= R1(C1+C2)+R3C1 R1(C1+C2)+(R2+R3)C1 R1(C1+C2)+R3C1
C1 0.047 R1 4.7K
C2 0.15
R3(k ) R2(k ) 0.19 79.81 5.21 74.66 11.83 68.17 19.99 60.01 30.27 49.73 43.21 36.79 59.49 20.51
Gv = 20 log
< Cut >
IN
+ +
R2 R3 [Designed Parameter] R1=4.7k , C1=0.047F , C2=0.15F C2 0.15 (Hz) C1 0.047 R1 4.7K Gain Setting -14dB -12dB -10dB -8dB -6dB -4dB -2dB
Designed Parameter
OUT
R2(k ) 79.81 74.66 68.17 60.01 49.73 36.79 20.51
f0 =
1 2 R1(R2+R3)C1C2 (R2+R3)R1C1C2
Q=
R1(C1+C2)+R3C1 R1(C1+C2)+R3C1 R1(C1+C2)+(R2+R3)C1
R3(k ) 0.19 5.21 11.83 19.99 30.27 43.21 59.49
Gv = 20 log
(dB)
Rev.1.0 Nov 22, 2005 page 13 of 15
R2S15902FP (2) Treble
< Boost >
IN
[Designed Parameter] RC=0.022F
+
R5 R4
-
+
OUT
Gain Setting +14dB +12dB +10dB +8dB +6dB +4dB +2dB
Designed Parameter
Gv =20 log
0.022
(R4+R5)2+ RC2 R4 +RC
2 2
(dB)
R4(k ) R5(k ) 1.03 5.23 1.41 4.85 1.86 4.40 2.40 3.86 3.06 3.20 3.90 2.36 4.95 1.31
RC

IN
Gv =20 log
R4 +RC
2
2
2
(dB)
2
+
R5
(R4+R5) + RC [Designed Parameter] RC=0.022F
+
OUT
Gain Setting -14dB -12dB -10dB -8dB -6dB -4dB -2dB
Designed Parameter
R4
RC
0.022
R5(k ) 5.23 4.85 4.40 3.86 3.20 2.36 1.31
R4(k ) 1.03 1.41 1.86 2.40 3.06 3.90 4.95
Curve of characteristics
Tone gain Gv (dB)
Frequency f(Hz)
Rev.1.0 Nov 22, 2005 page 14 of 15
R2S15902FP
Application Example
L
4.7k 0.047
R
C
SW
SL
SR
0.15
4.7
4.7
4.7
4.7
4.7
4.7
MCU 14
C
22
0.047 4.7k 0.15 0.022
21
20
+
19
+
18
+
+
17
Gain Control
+
16
Gain Control
+
15
Gain Control
13
D
12 11
50k
23 24 25
Gain Control
Gain Control
Gain Control
+ -
+ -
+ -
Cch Vol 50 k
SWch Vol 50k
SLch Vol 50 k
+ -
MCU I/F
+ + + + + +
2.2
SRIN
+ -
+ -
SRch Vol 50 k
Logic
50k
10
2.2
SLIN
Bass /Tre Bass /Tre
Lch Vol 25 k Input Gain 50k RchVol 25k 50k
0.022
9 8 7 6 5 4
2.2
SWIN
26 27 28 29
+ -
2.2
CIN
2.2
RIN LIN
-3db
25k
2.2
25 k
Input Gain
50 k
30
2.2
+ -
REC Output Gain Lch
2.2
INL1
+ 31
25k
2.2
INR1
+ 32
25k
REC Output Gain Rch
Input ATT
50 k
3 2
2.2
-3db
2.2
INL2
+ 33
25k 25k 25k 25k 25k 25k
Input ATT 50 k Rch (L+R)
Lch (L- R) 50 k
1
34
2.2
35
+
2.2
+
36
2.2
37
38
39
40
41
+
42
43
2.2
44
LPF
+
2.2
+
2.2
+
100 100 0.1 2.2
INL3
INL4 (RECL1)
INR2
INR3
INR4 (RECR1)
VCC 9V
ADC
Rev.1.0 Nov 22, 2005 page 15 of 15
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1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
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Refer to "http://www.renesas.com/en/network" for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501 Renesas Technology Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K. Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900 Renesas Technology (Shanghai) Co., Ltd. Unit 205, AZIA Center, No.133 Yincheng Rd (n), Pudong District, Shanghai 200120, China Tel: <86> (21) 5877-1818, Fax: <86> (21) 6887-7898 Renesas Technology Hong Kong Ltd. 7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2730-6071 Renesas Technology Taiwan Co., Ltd. 10th Floor, No.99, Fushing North Road, Taipei, Taiwan Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999 Renesas Technology Singapore Pte. Ltd. 1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001 Renesas Technology Korea Co., Ltd. Kukje Center Bldg. 18th Fl., 191, 2-ka, Hangang-ro, Yongsan-ku, Seoul 140-702, Korea Tel: <82> (2) 796-3115, Fax: <82> (2) 796-2145
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Renesas Technology Malaysia Sdn. Bhd Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No.18, Jalan Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia Tel: <603> 7955-9390, Fax: <603> 7955-9510
(c) 2005. Renesas Technology Corp., All rights reserved. Printed in Japan.
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